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WAFER-LEVEL FANOUT PACKAGES EOTPR has recently been used to localize faults in state-of-the-art wafer-level fanout packages, demonstrat- ing the importance of EOTPR at the forefront of package development. Figure 7 shows a schematic of this type of device, which consists of nonconventional wafer-level packaging with innovative interconnections, enabling a

package-on-package configuration for a memory chip. A custom redistribution device, called Via Frame, allows memory stacking. These components are integrated into an epoxy mold compound on a series of RDLs. A unit that failed an automated electrical continuity test performed after 1000 temperature cycles within a range of − 40° to 125°C was identified as a suitable can- didate for EOTPR investigation. Further curve tracing revealed an open fault on the failed net. Subsequent EOTPR characterization is presented in Fig. 8 (left), in which the failed unit’s waveform (red curve) is compared to a KGD (green curve). In addition, the waveform from a reference unit (blue curve) is shown, which has a known open fault located 160 µm from the end of the RDL. By using the known distance between the reference unit open and the solder ball, the location of the fault in the failed unit was calculated to be 100 µm from the end of

ELECTRONIC DEVICE FAILURE ANALYSIS | VOLUME 20 NO. 4

Fig. 6 EOTPR results from a MEMS case study. The EOTPR waveformfor the KGD is shown by the green line. The EOTPR waveform from the failed unit, shown by the red line, clearly shows an open fault, indicated by the positive peak in the waveform. Inset: SEM image of a cross section through the failed unit TSV, showing a crack at the top of the TSV.

Fig. 7 Schematic of the wafer-level fanout package presented in this study.

Fig. 8 Left: EOTPR results. The EOTPR waveform for the KGD is shown by the green line. The EOTPR waveform from the failed unit, shown by the red line, clearly shows an open fault, indicated by the positive peak in the waveform. This occurs at a similar location to the open in the reference sample, shown by the blue curve. Right: SEM images showing the region of the RDL exposed with FIB on the failing unit. A crack is clearly visible through the RDL, causing the open fault.

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